This is a systolic array capable of matrix multiplication and 2D convolution using 9 processing elements
this project needs to be connected to an external FPGA to feed in the data to compute on
FPGA connected to all 24 IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | readA[0] | write[0] | readB[0] |
| 1 | readA[1] | write[1] | readB[1] |
| 2 | readA[2] | write[2] | readB[2] |
| 3 | readA[3] | write[3] | readB[3] |
| 4 | readA[4] | write[4] | readB[4] |
| 5 | readA[5] | write[5] | readB[5] |
| 6 | readA[6] | write[6] | readB[6] |
| 7 | readA[7] | write[7] | readB[7] |